Architecture
08-25[arch]Not a Smaller GPU: How Jalapeño Rebuilds Inference Around Locality25m08-24[arch]Vera Rebalances the CPU: 88 Cores Fed by 1.2 TB/s19m07-26[arch]RTL Automation Starts After the First Draft15m06-01[arch]Production Evidence Replaced the Architecture Promise: 43 Company-Affiliated Papers at ISCA 202616m05-02[arch]SPEC CPU 2026 Stops Pretending Every Core Runs the Same Program19m03-22[arch]AI Systems Turned Every Layer into a Scheduling Problem: 44 Company-Affiliated Papers at ASPLOS 202615m01-31[arch]Scale Exposed the Hidden Architecture Bill: 28 Company-Affiliated Papers at HPCA 202613m
# 2025
11-20[arch]AI Can Search a Microarchitecture, but It Still Needs an Executable Contract15m10-17[arch]Implementation Details Became System Constraints: 35 Company-Affiliated Papers at MICRO 202514m08-06[arch]The Hardware-Software Contract Moved Again: 59 Company-Affiliated Papers at ASPLOS 202516m07-07[arch]One Scheduler for Ten Accelerators: XSched's Three Levels of Preemption19m06-21[arch]A CPU Benchmark That Meta Was Willing to Buy Servers With19m06-20[arch]Architecture Reached the Fleet: 43 Company-Affiliated Papers at ISCA 202515m03-30[arch]Prefill Has Compute, Decode Has Bandwidth: POD-Attention Puts Both on the Same SM13m03-01[arch]Measured Architecture Became an Operating Policy: 40 Company-Affiliated Papers at HPCA 202515m# 2023
03-24[arch]Making a SmartNIC Fast Across a Slow PCIe Boundary13m